Instruction set, by machine-code format

The descriptions below uses C-style syntax. The array m[] refers to core memory. A, X, OV, SS and PC refers to the accumulator, index register, overflow bit, console sense status bit and program counter respectively. The program counter is assumed always tyo be incremented by the number of bytes in the instruction, after the instruction is fetched but before it is executed, i.e. this incrementing is done before any additional manipulation of the program counter described below. The syntax {} is used for referring to bits and bit fields.

1. Single-word memory-reference instructions


D

Address field (0 to 255)
I
=
Indirect-address flag
AM 
=
Address mode
EA
=
Effective address

AM
 I 
  Word mode (Word operand)
Byte mode (Byte operand)
00
 0 
 EA = D (Words :00 – :FF) 
EA = D (Bytes :00 – :FF)
01
 0
 EA = PC + D + 1
EA = PC + D + 1 (Byte 0)
10
 0
 EA = D + X
EA = D + X
11
 0
 EA = PC − D
EA = PC + D + 1 (Byte 1)
00
 1
 EA = *D
EA = *D
01
 1
 EA = *(PC + D + 1)
EA = *(PC + D + 1)
10
 1
 EA = *(D + X)
EA = *(D + X)
11
 1
 EA = *(PC − D)
EA = *(PC − D)

 
Skeleton
Mnemonic
Description
Semantics
Program counter
:B000
LDA*
Load A A = m[EA]

:E000
LDX*
Load X X = m[EA]

:9800
STA*
Store A m[EA] = A

:E800
STX*
Store X m[EA] = X

:B800
EMA*
Exchange memory and A m[EA] <=> X

:8800
ADD*
ADD to A A += m[EA]

:9000
SUB*
SUB from A A -= m[EA]

:8000
AND*
AND to A A &= m[EA]

:A000
IOR*
Inclusive OR to A A |= m[EA]

:A800
XOR*
Exclusive OR to A A ^= m[EA]

:F000
JMP 
Jump PC = EA

:F800
JST 
Jump and store m[EA] = PC+1
PC = EA+1
:D800
IMS 
Increment memory and skip on zero result m[EA]++
if (m[EA] == 0)  PC++
:CD00
SCM*
Scan memory while (X > 0 && m[EA+X--] != A)
if (m[EA+X+1) != A) PC++
:D000
CMS*
Compare memory and skip if high or equal
if (m[EA] == A) PC += 2; else if (m[EA] > A) PC += 1

Instructions marked with an asterisk (*) are have byte-mode equvalents, eg. LDAB for LDA and ANDB for AND. These mnemonics generate indentical instructions; the byte variants are for readability only.

SCM: Note that the effective address should be the address of the word array - 1, that searching starts from the end of the array, and that X is decremented even if a match is found.
 
Label
Instruction
Operand
Comment
BUF    
RES        
128      
Compare A to m[0x80]
...




LXI
128
X = 128

LAI
'.'
A = '.'

SCM
BUF
Search buf for a period

JMP
FOUND
X is offset from BUF
NOTFND
...

 
CMS: Note that this instruction distinguishes betwee three cases. Typical use:
 
Label
Instruction
Operand   
Comment

SCM   
:80
Compare A to m[0x80]

JMP
LESS


JMP
GREATR

EQUAL  
...


 

2. Double-word memory-reference instructions




OPCODE 
= 100
for NRM 0 to 15

= 101
for NRM 16 to 31

= 110
for MPY

= 111
for DVD
K
= Instruction count or bit position

 
Skeleton
Mnemonic
Description
Semantics
Program counter
Remark
:1970 DVD Divide (A, X) = (AX % m[EA], AX / m[EA])


:1960 MPY Multiply and add AX = A + X*m[EA]


:1940 NRM Normalize A and X while (m[EA] > 0 && A{15} != A{14}) m[EA]--


:4300 ADX Add to X X += m[EA]

LSI -2/60 only
:4320 SBX Subtract from X
X -= m[EA]

LSI -2/60 only
:4340 EMX Exchange memory and X
X <=> m[EA]

LSI -2/60 only
:4B00 MSB Memory set bit m[EA]{K} = 1

LSI -2/60 only
:4B20 MRB Memory reset bit m[EA]{K} = 1
LSI -2/60 only
:4B40 MCB Memory complement bit m[EA]{K} ^= 1
LSI -2/60 only
:4B60 MTB Memory test bit OV = m[EA]{K}

LSI -2/60 only
:4310 DMS Decrement memory and skip
if (--m[EA] == -1) PC++ LSI -2/60 only
:4203 JSKR Jump and stack registers See below
PC = EA+1
LSI -2/60 only
:4241 JSKS Jump and stack status See below

LSI -2/60 only
:6A03 RTNR Return registers See below
LSI -2/60 only
:6A41 RTNS Return status See below
LSI -2/60 only

 JSKR, RTNR: Typical use:
 
Label
Instruction
Operand   
Comment
STACK
RES
1
Return address will go here

RES
1
Status will go here

RES
1
X will go here

RES
1
A will go here
SP
DATA
SP
Address of first word after the stack

...



JSKR
SUB1


DATA
:1209


...

Call returns here




SUB1
DATA
SP
Entry point contains address of stack pointer

LDAS
*SP,+
A = :1209

...



RTNR



At entry to SUB1, SP will point to the address after JSKR. "LDAS *SP,+" will retrieve the argument, and increment the element on the top of the stack, i.e. the return address. Note that when executing the "LDAS *SP,+" instruction, the stack pointer, thanks to the indirect flags "*", is not SP but the memory cell pointed to by SP, in this case the return address stored in STACK. This is the reason for the return address being updated.

N.B.: It is the responsibility of the called routine to update the return address, so that the return instruction does not jump into the arguments after the JSKR instruction.

JSKS/RTNS works like JSKR/RTNR, except that they stack only one word, the status.

3. Byte immediate instructions



 
Skeleton
Mnemonic
Description
Semantics
Program counter

0B00 AAI Add to A immediate A += D

0D00 SAI Subtract from A immediate A -= D

C000 CAI Compare to A immediate, and skip if not equal
if (A != D) PC++
C100 CXI Compare to X immediate, and skip if not equal
if (X != D) PC++
C200 AXI Add to X immadiate X += D

C300 SXI Subtract from X immediate X -= D

C400 LXP Load X positive immediate X = D

C500 LXM Load X minus immediate X = -D

C600 LAP Load A positive immediate A = D

C700 LAM Load A minus immediate A = -D


4. Conditional jump instructions



Bits
Field
Definition
12
G
Test group indicator



G = 0 for OR group



G = 1 for AND group
7-11
Conditions
Microcode of test condition


    
Bit
AND group
OR group



7
A positive
A negative



8
A != 0
A == 0



9
OV reset
OV set



10
Sense indicator on
Sense indicator off



11
X != 0
X == 0
6
R
Jump direction



R = 0 for forward jump (EA = $ - D)



R = 1 for backward jump (EA = $ + D + 1)
0-5
D
Jump distance
 
Skeleton
Mnemonic
Description
Semantics
Program counter

2080 JOC Jump on condition

3180 JAG Jump if A greater than zero
if (A > 0) PC = EA
2180 JAL Jump if A less than one
if (A < 1) PC = EA
2080 JAM Jump if A minus
if (A < 0) PC = EA
3100 JAN Jump if A not zero
if (A != 0) PC = EA
3080 JAP Jump if A positive
if (A >= 0) PC = EA
2100 JAZ Jump if A zero
if (A == 0) PC = EA
3800 JXN Jump if X not zero
if (X != 0) PC = EA
2800 JXZ Jump if X zero
if (X == 0) PC = EA
3200 JOR Jump if overflow reset
if (!OV) PC = EA
2200 JOS Jump if overflow set
if (OV) PC = EA
2400 JSR Jump if sense switch reset
if (!SS) PC = EA
3400 JSS Jump if sense switch set
if (SS) PC = EA

5. Single-register shift instructions



 
Skeleton
Mnemonic
Description
Semantics
Program counter

1050 ALA Arithmetic shift left A

1028 ALX Arithmetic shift left X

11D0 ARA Arithmetic shift right A

10A8 ARX Arithmetic shift right X

13A8 LRX Logical shift X Right

1350 LLA Logical shift left A

1328 LLX Logical shift left X

13D0 LRA Logical shift right A

1150 RLA Rotate left A with overflow

1128 RLX Rotate left X with overflow

11D0 RRA Rotate right A with overflow

11A8 RRX Rotate right X with overflow

1340 BAO Bit of A to overflow

1320 BXO Bit of X to overflow

13C0 LA0 LSB of A to overflow

13A0 LXO LSB of X to overflow

1400 SOV Set overflow

1200 ROV Reset overflow

1600 COV Complement overflow


6. Double-register shift instructions



 
Skeleton
Mnemonic
Description
Semantics
Program counter

1900 LRL Long rotate left

1980 LRR Long rotate right

1B00 LLL Long logical shift left

1B80 LLR Long logical shift right

6B10 ASB A set bit

6B00 XSB X set bit

6B30 ARB A reset bit

6B20 XRB X reset bit

6B50 ACB A complement bit

6B40 XCB X complement bit

6B70 ATB A test bit

6B60 XTB X test bit


7. Register change instructions



 
Skeleton
Mnemonic
Description
Semantics
Program counter
Remark
0000 NOP No operation

0110 ZAR Zero A register A = 0

0108 ZXR Zero X register X = 0

0118 ZAX Zero A and X A = X = 0

0350 ARP A register to +1 A = 1

0528 XRP X register to +1 X = 1

0358 AXP A and X to +1 A = X = 1

0008 XRM X register to -1 X = -1

0010 ARM A register to -1 A = -1

0018 AXM A and X to -1 A = X = -1

0310 NAR Negate A register A = -A

0508 NXR Negate X register X = -X

0510 NXA Negate X to A A = -X

0308 NAX Negate A to X X = -A

0048 TAX Transfer A to X X = A

0030 TXA Transfer X to A A = X

0428 EAX Exchange A and X A <=> X

0090 IPX Increment P to X X = P+1

0150 IAR Increment A register A++

0128 IXR Increment X register X++

00D0 DAR Decrement A register A--

00A8 DXR Decrement X register X--

0210 CAR Complement A register A = ~A

0408 CXR Complement X register X = ~X

0130 IXA Increment X to A A = X+1

0148 IAX Increment A to X X = A+1

00B0 DXA Decrement X to A X = X-1

00C8 DAX Decrement A to X X = A-1

0410 CXA Complement X to A A = ~X

0208 CAX Complement A to X X = ~A

068A BSA Bits set A A |= X

0688 BSX Bits set X X |= A

06CA BCA Bits clear A A &= ~X

06C8 BCX Bits clear X X &= ~X

0068 ANX AND of A and X to X X &= A

0070 ANA AND of A and X to A A &= X

00F0 XXA Exclusive OR X to A A ^= X

0168 XAX Exclusive OR A to X X ^= A

0608 NRX NOR of A and X to X X = ~(A | X)

0610 NRA NOR of A and X to A A = ~(A | X)

0430 XNX Execute indexed Execute(X + *PC++)

LSI-2/60 only
0218 EIX Execute instruction pointed to by X Execute(*X)

0028 AAX Add A to X X += A

0050 AXA Add X to A A += X

0088 SXA Subtract X from A A -= X

0170 SAX Subtract A from X X -= A


XNX fetches the next instruction, increments the program counter, adds X to the fetched instruction, and executes the resultinging one-word instruction.
EIX executes the instruction pointed to by X.

8. Control instructions



 
Skeleton
Mnemonic
Description
Semantics
Program counter

0800 HLT Halt

0800 STOP Stop with argument

0A00 EIN Enable interrupts

0C00 DIN Disable interrupts

0E00 SBM Set byte mode

0F00 SWM Set word mode

6800 SIN Status inhibit


9. Input and output instructions



 
Skeleton
Mnemonic
Description
Semantics
Program counter

1C05 IAH Input console data to A and halt A = CD; halt

1C09 IXH Input console data to X and halt X = CD; halt

1C21 IPH Input console data to P and halt P = CD; halt

1C11 IIH Input console data to I and halt I = CD; halt

1C03 IMH Input console data to memory and halt *PC = CD; halt
PC++
4404 OCA Output A to console data CD = A

4604 OCX Output X to console data CD = X

1C04 OAH Output A to console data and halt CD = A; halt

1C08 OXH Output X to console data and halt CD = X; halt

1C20 OPH Output P to console data and halt CD = P; halt

1C10 OLH Output location to console data and halt ???

1C02 OMH Output memory to console data and halt CD = *PC
PC++
4000 SEL Select function

Data bus = 0
4400 SEA Select and present A

Data bus = A
4600 SEX Select and present X

Data bus = X
4800 SSN Sense and skip on no response
if (!SENSE) PC++
4900 SEN Sense and skip on response
if (SENSE) PC++
5800 INA Input to A A = DB

Unconditional
5A00 INX Input to X X = DB

Unconditional
5C00 INAM Input to A masked A &= DB

Unconditional
5E00 INXM Input to X masked X &= DB

Unconditional
7800 IBA Input byte to A A{7..0} = DB{7..0}

Unconditional
7A00 IBX Input byte to X X{7..0} = DB{7..0}
Unconditional
7C00 IBAM Input byte to A masked A{7..0} &= DB{7..0}
Unconditional
7E00 IBXM Input byte to X masked X{7..0} &= DB{7..0}
Unconditional
6800 OTZ Output zero

Unconditional
6C00 OTA Output A

Unconditional
6E00 OTX Output X

Unconditional
5900 RDA Read word to A A = DB

Conditional
5B00 RDX Read word to X X = DB

Conditional
5D00 RDAM Read word to A masked A &= DB

Conditional
5F00 RDXM Read word to X masked X &= DB

Conditional
7900 RBA Read byte to A A{7..0} = DB{7..0}
Conditional
7B00 RBX Read byte to X X{7..0} = DB{7..0}
Conditional
7D00 RBAM Read byte to A masked A{7..0} &= DB{7..0}
Conditional
7F00 RBXM Read byte to X masked X{7..0} &= DB{7..0}
Conditional
6900 WRZ Write zero

Conditional
6D00 WRA Write from A

Conditional
6F00 WRX Write from X

Conditional

Select instructions performs configuration operations on the device, but no actual I/O. The device and operation is written to the data address bus, a the

Sense instructions test a specified condition, typically to see if the device is ready for I/O.

Unconditional I/O instructions perform their operation without checking that the device is ready.

Conditional I/O instructions checks that the device is ready before performing their operaton. If the device is not ready, the instruction loops until it is, and then performs the operation.

10. Automatic input and output instructions



 
Skeleton
Mnemonic
Description
Semantics
Program counter

5000 AIN Automatic input word to memory

5400 AIB Automatic input byte to memory

6000 AOT Automatic output word from memory

6400 AOB Automatic output byte from memory


These instructions read or write a singe word or byte


A simplified example

A more realistic example
Label
Instruction
Operand   
Comment
BUFSIZ
EQU
256

BUF
RES
BUFSIZ


...



AIN
device,func Unconditionally read word from device

DATA
-BUFSIZ
Note: Negative. Incremented at each execution

DATA
BUF-1
Note: -1. Pre-incremented at each execution

JMP
DONE
Executed if counter has reached zero

...

Executed if counter has not yet reached zero
This code can only be used once, since the data counter and the buffer pointer
are modified.
   
Label
Instruction
Operand   
Comment
BUFSIZ
EQU
256

BUF
RES
BUFSIZ


...



LAI
-BUFSIZ


STA
SIZE


LAI
BUF-1


STA
BUFADR


AIN
device,func
Unconditionally read word from device
SIZE
DATA
0
Note: Negative. Incremented at each execution
BUFADR
DATA
0
Note: -1. Pre-incremented at each execution

JMP
DONE
Executed if counter has reached zero

...

Executed if counter has not yet reached zero
This code can be used several times.
x x x

11. Block input and output instructions



 
Skeleton
Mnemonic
Description
Semantics
Program counter

7100 BIN Block in

7500 BOT Block out


12. Stack instructions



 
Skeleton
Mnemonic
Description
Semantics
Program counter

14D8 LDAS Load stack element into A

1698 LDXS Load stack element into X

1618 SLAS SE address to A

1478 STAS Store A in stack element

16B8 STXS Store X into stack element

14F8 EMAS Exchange stack element and A

1418 ANDS AND stack element to A

1498 IORS Inclusive OR stack element to A

14B8 XORS Exclusive OR stack element to A

1438 ADDS Add stack element to A

1458 SUBS Subtract stack element from A

16D8 JMPS Jump to SE

16F8 JSTS Jump to SE and store

1658 CMSS Complement SE to A and skip if high or equal

1678 IMSS Increment SE and skip on zero result


13. Cyclic redundancy check instructions



 
Skeleton
Mnemonic
Description
Semantics
Program counter

4D00 CRC Cyclic redundancy check

01D0 WFI Wait for interrupts
LSI-2/60 only

Why WFI belongs to this group is not obvious.

14. LSI-2/60 text manipulation instructions



 
Skeleton
Mnemonic
Description
Semantics
Program counter

4788 MOVT Move a text string

4708 ADDT Add text

4718 SUBT Subtract text

4798 CMST Compare text strings and skip